The present invention relates generally to techniques for connecting an integrated circuit device to an external circuitry, and more particularly to a tape automated bonding (TAB) interconnections by use of electrically conducting adhesive materials, and more particularly to controlled collapse chip connection (C4) or flip chip interconnections by use of electrically conducting adhesive materials.
Electrical interconnection of an integrated circuit (IC) device to an external circuitry is a critical technology of microelectronic packaging, which often dictates the performance as well as the reliability of a whole electronic system, such as a computer system. At present, three technologies are commonly practiced to electrically interconnect a silicon IC to the next level of circuitry: wire bonding, tape automated bonding (TAB) and flip chip or controlled collapse chip connection (C4).
Wire bonding is the most widely used method for chip interconnection. Depending on the source of bonding energy supplied, wire bonding techniques are classified into three methods: thermocompression, ultrasonic, and thermosonic bonding. In thermocompression bonding, where heat and pressure are applied as the major source of bonding energy, gold wire is commonly used for ball and wedge bonding. Au wire is first melted to form a ball at the tip of the wire. While the ball is heated through a bonding capillary, the ball is pressed against the aluminum pad on a chip. The other end of the gold wire is then bonded to a gold-plated lead frame or substrate by thermocompression bonding. The bonding parameters to be adjusted are tool temperature, vertical force, and bonding time. The vertical force causes plastic deformation mainly in the wire, which enables intimate contact to occur between the bonding interfaces. The relatively high bonding temperature, 300-500xc2x0 C., promotes interdiffusion at the bonding interface to form a metallurgical bond. It also facilitates the plastic deformation in the wire. However, when two dissimilar metals are bonded, such as Au to Al at an elevated temperature, the formation of undesirable intermetallic phases can occur at the interconnection.
In ultrasonic bonding, the wire is not heated directly. The vibrational energy supplied by a transducer mounted to a bonding tool is coupled with vertical force to form a bond between two metal surfaces. The most common metallurgy used in ultrasonic bonding is Al wire bonded to Al pad on chip or Au-plated pad on lead frame or substrate. A significant amount of plastic deformation is also observed in the ultrasonically bonded wire.
In thermosonic bonding, a bond stage is heated typically to 150xc2x0 C., unlike thermocompression bonding where the bond wire is heated. The stage heating is known to improve the bondability of surfaces which are difficult to bond. In comparison to ultrasonic bonding, thermosonic bonding is used when a minimal amount of ultrasonic energy or vertical force is required due to the susceptibility of mechanical damage of the devices, such as chip cratering.
Although wire bonding is a simple and most economical method for chip interconnection, it has two fundamental limitations: a) it is limited in the maximum number of interconnections to be made for a given size of a chip by the length of the perimeter of the chip, and b) it is a serial process, where the throughput depends on the number of interconnections to be made. TAB technology can alleviate both of these limitations, because the bonding scheme is mass or gang bonding and interconnection with a finer pitch has been demonstrated. Two interconnections are made in TAB; inner lead bond (ILB), which connects a chip to tape, and outer lead bond (OLB), which connects tape to a substrate or board. The most common metallization structure used for TAB ILB joining is a Sn-plated Cu/polyimide tape and electroplated Au bumps on a chip. FIG. 1 is an illustration of the ILB bonding operation using a copper 17/polyimide 15 tape that is bonded to gold bumps 13 on a chip 11. To protect the copper surface, a thin layer of tin or gold is coated on it. Heat and force are supplied by a thermode 19 which heats the copper beams 17 and simultaneously presses them down to the gold bumps 13. When the tape is coated by tin, the bond is formed by the melting of the tin layer to react with the gold bumps. The bonding temperature required is in the range of 250 to 300xc2x0 C., for a few seconds. The bonding pressure required is in the range of 20 to 30 Kpsi, and the total amount of force to be applied is therefore proportional to the number of interconnections to be made. Since the bonding occurs by the reaction of liquid tin with solid gold, much less force is required compared to the case of gold to gold thermocompression bonding of a gold coated tape with gold bumps. For the case of gold to gold bonding, a considerable amount of pressure and a high temperature ranging from 300 to 500xc2x0 C., are required to accomplish a solid-state bonding.
Flip chip bonding is the most effective chip interconnection method currently used for high performance packaging applications. This bonding method utilizes solder bumps to connect high performance chips directly to a ceramic or organic substrate. Solder bumps of Pbxe2x80x94Sn alloy are deposited onto a wafer through a mask on each chip in a two dimensional array. Diced chips with solder bumps are flipped and roughly aligned to the bond pads on a substrate. Solder joints are formed by putting an assembly of chips on a substrate through a reflow furnace maintained at a temperature above the melting point of the solder bumps.
FIG. 2 is a schematic diagram showing a cross-sectional view of a solder bump with the thin film interface layers on both a silicon chip and a ceramic substrate. For the chip 21 side, typically a thin film layer of Cr 24/Cu 25/Au 26 is deposited prior to solder bump deposition, and a Ni 29/Au 28 layer is typically deposited to Mo bond pads 31 for the ceramic substrate 30 side. These interface layers provide adhesion to the underlying materials as well as providing a good solderable surface. Since solder bumps are in a liquid state during reflow, a series of fast reactions can occur at both interfaces; dissolution of Au layers and formation of various intermetallic compounds of Auxe2x80x94Sn, Cuxe2x80x94Sn, Nixe2x80x94Sn and other ternaries.
Solder bumps in flip chip bonding serve not only as electrical interconnections, but also as mechanical/physical interconnections between the chip and the substrate. When an electronic system is in operation, the chip temperature goes up and down, resulting in thermal cycling. Since the solder bumps connect two material systems with different thermal coefficient of expansion, the differential thermal expansion between the chip and the substrate material induces a thermal strain in the solder interconnection. A repeated application of this kind of thermal strain leads to thermal fatigue of the solder joint, which eventually causes an electrical failure in the system. Thermal fatigue life is known to be affected strongly by the magnitude of the thermal strain induced in solder joints in a similar manner to the case of low cycle fatigue behavior in most engineering materials. To reduce or control thermal strain and the risk of solder joint failure, several approaches have been practiced: choosing new substrate materials which better match the thermal coefficient of the chip, improving thermal management to reduce the temperature differential between active devices and their environments, producing more compliant and xe2x80x9ctallerxe2x80x9d solder joints, application of encapsulation materials around solder joints, and others.
In accordance with the present invention, a strong and compliant chip interconnection with a TAB package is made possible. Moreover, the present invention makes it possible to provide a stable TAB joint structure which does not cause excessive interfacial reactions at the joints. Also according to the present invention, a TAB structure which exhibits a longer fatigue life can be obtained.
The present invention also provides joining materials and method which make TAB inner lead bonding possible at a lower pressure, which in turn can reduce any damage to the circuitry. It is also possible according to aspects of the present invention to provide a joining material and method which can handle a larger chip size for a TAB package than that packaged by a conventional method.
Furthermore, pursuant to the present invention, a strong and compliant chip interconnection with a flip chip package is made possible. Moreover, the present invention makes it possible to provide a stable flip chip joint structure which does not cause excessive interfacial reactions at the joints. Also according to the present invention, a flip chip structure which gives a longer fatigue life can be obtained. It is also possible according to aspects of the present invention to provide a joining material and method which can handle a larger module size in a flip package than that packaged by a conventional method.
Moreover, in accordance with the present invention, a strong and compliant interconnection for an active matrix liquid crystal display (AMLCD) package is made possible. Also, the present invention makes it possible to provide a stable joint structure of an AMLCD package that does not cause excessive interfacial reactions at the joints. According to the present invention, an AMLCD package which gives a longer fatigue life and a better electrical performance can be achieved. It is also possible according to aspects of the present invention to provide a joining material and method which can handle a larger panel size in an AMLCD package than that packaged by a conventional method.
More particularly, an aspect of the present invention is an interconnection scheme of a tape automated bonding (TAB) package, a flip chip package and an active matrix liquid crystal display panel by use of an electrically conductive material formed from a plurality of conducting particles. Each conducting particle has an electrically conductive coating which is fused to an electrically conductive coating on an adjacent particle to form a network of fused conducting particles.
Another aspect of the present invention is a method of forming an electrically conductive joint between a conducting bump on a chip and a contact pad by forming a paste of particles having an electrically conductive coating and a polymeric material wherein the paste is disposed to be adhesively and electrically joined. Heat and pressure are provided to fuse the electrically conductive particles to themselves, and to metallurgically bond them to the contact pads.
A still further aspect of the present invention is a method of forming an electrically conductive joint between a glass panel of an AMLCD and TAB leads by forming a paste of particles having an electrically conductive coating and a polymeric material wherein the paste is disposed to be adhesively and electrically joined. Heat and pressure are provided to fuse the electrically conductive particles to themselves, and to metallurgically bond them to the contact pads.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.